Verification Engineers in Bangalore...
Design Verification Engineers
Experience: 3-15 Years. Location: Bangalore, Pune
Job Description
• Create verification plans for SoC / IP level verification.
• Create test benches in System Verilog / Specman.
• Write test cases in C / C++, Assembly, e / SV etc.
• Utilize advanced verification methodologies like VMM / OVM / UVM / eRM for writing verification environments.
• Expertise in standard IP blocks and protocols such as PCIe, USB 3.0, SATA, Ethernet, TCP/IP, IPSec, iSCSI, DDR3.
• Extensively worked on debugging tests in RTL / GLS both at SOC and IP level.
• Worked on generating code / functional coverage and analyzing the results.
• Low power verification techniques using industry standard tools.
• Worked on writing assertions using standard languages.
• Write tools and scripts in Perl and other scripting languages to enhance the verification process.
• Excellent problem solving and debugging skills.